Polyphase impedance transformation amplifier

ABSTRACT

A method and apparatus for greatly increasing the output voltage or current transformation ratio in an impedance transformation amplifier are disclosed. Broadly, the method takes advantage of multiple, phase-synchronized impedance transformation stages, each of which preferably contributes an equal portion of the eventual output voltage or current.

REFERENCE TO RELATED APPLICATION

This application claims priority from U.S. Provisional PatentApplication Ser. No. 60/380,436, filed May 13, 2002, the entire contentof which is incorporated herein by reference.

FIELD OF THE INVENTION

This invention relates generally to impedance transformation amplifiers,and in particular, to techniques for increasing the output voltage orcurrent transformation ratio in an amplifier of this kind.

BACKGROUND OF THE INVENTION

Impedance transformation amplifiers, as described in U.S. Pat. No.5,610,553, entitled “Switching Amplifier with Impedance TransformationOutput Stage” and incorporated herein by reference, provide outputvoltage or current exceeding that of the input without the use of atransformer. The maximum voltage or current amplification ratio islimited at low load impedances, however, if high efficiency is to beobtained. Typical voltage ratios with loads under eight ohms aretypically limited to 4:1 or less. In some limited voltage applications,the maximum obtainable ratio does not provide adequate power. Thereexists a need to increase the output amplification ratio in impedancetransformation amplifiers, so as to extend their use in higher-powerapplications.

SUMMARY OF THE INVENTION

This invention resides in a method and apparatus for greatly increasingthe output voltage or current transformation ratio in an impedancetransformation amplifier. Broadly, the method takes advantage ofmultiple, phase-synchronized impedance transformation stages, each ofwhich preferably contributes an equal portion of the eventual outputvoltage or current.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 shows a preferred embodiment of the present invention; and

FIG. 2 shows voltage waveforms of control and output signals withrespect to the circuitry of FIG. 1.

DETAILED DESCRIPTION OF THE INVENTION

Referring now to FIG. 1, voltage source 101 supplies power for allsubsequently noted actions. Switching device 104 charges inductor 102under the control of signal 119 from PWM Modulator 109, which providescontrol signals in response to the receipt of incoming data stream 118.Standard pulse-width modulation techniques are preferably used.

At the termination of signal 119, inductor 102 releases its storedcharge through diode 106 into capacitor 108. Following this cycle ofevents, switching device 105 charges inductor 103 under the control ofsignal 120 from PWM Modulator 109. At the termination of signal 120,inductor 103 releases its stored charge through diode 107 into capacitor108. Alternately, it can be seen that energy representative of incomingdata 118 is stored at the voltage of source 101 in either inductor 102or 103, and released into capacitor 108 at another voltage.

Control signals on lines 121 and 122 are controlled by PWM Modulator 109to reflect the sign of incoming data 118. Such operation may occurstatically or dynamically, according to various practices in the art.Control signals 121 and 122 serve to activate switching devices 110 and112, respectively, while deactivating switching devices 111 and 113,respectively, through the operation of inverters 123 and 124.

The net effect of the above is that charge stored in capacitor 108 ismade available to one terminal of load 117 through either switchingdevice 110 and inductor 114, or switching device 112 and inductor 115,thereby controlling direction of current flow through load 117.Inductors 114 and 115, in conjunction with capacitor 116 serve to filterout alias products inherent in the sampling process. Current return forload 117 is effected through either switching device 111 or 113 tovoltage source 101. This connection method allows output available atload 117 to approach zero.

Referring now to FIG. 2, trace 201 and 202 show activity of controlsignals 119 and 120, respectively, of FIG. 1. Traces 203 and 204 showactivity of the cathodes of diodes 106 and 107, respectively, hencevoltage potential of inductors 102 and 103, respectively, of FIG. 1.Trace 205 shows activity at the common connection of diodes 106 and 107,capacitor 108, and switching devices 110 and 112, all of FIG. 1; hencethe instantaneous voltage produced by the actions described herein.

At time 206, control signal 119 is asserted in trace 201, the result ofwhich can be seen at diode 106 in trace 203. At time 207, release ofcontrol signal 119, seen in trace 201, produces a flyback voltage frominductor 102, seen in trace 203. This flyback voltage, conducted throughdiode 106, results in a potential increase across capacitor 108, seen intrace 205. Subsequent assertion and deassertion of control signal 120,seen at times 208 and 209, respectively, result in a similar flybackvoltage from inductor 103, seen in trace 204 at time 209, and apotential increase across capacitor 118, as seen in trace 205 at thistime.

Note that use of two alternate inductor flyback periods results inpossible charge periods twice that of the output period (the period thatwould be available to an inductor of a single stage) for each inductor.This period multiplication holds true for subsequent flyback stageadditions, i.e., use of three inductors allows inductor charge periodsthree times that of the output period, etc. In that doubling theinductor charge period available doubles its maximum current, theresultant maximum flyback voltage therefore doubles for any given loadresistance. Resultant output power of an impedance transformationamplifier of this topology then becomes that of the voltagetransformation ratio in use multiplied by the square of the number ofstages used.

1. A polyphase impedance transformation amplifier connecting an inputsignal to a load, comprising: a pulse-width modulator (PWM); gatedswitches controlled by the PWM for routing energy from a power source tothe load in accordance with the input signal; and a plurality ofimpedance-transformation stages, each controlled by the PWM for routingenergy from a power supply to the power source, thereby increasing theoutput transformation ratio at the load.
 2. The impedance transformationamplifier of claim 1 wherein each impedance-transformation stageincludes an inductor in series with a gated switch controlled by thePWM.
 3. The circuitry of claim 1, wherein each impedance-transformationstage contributes an equal portion of the energy coupled to the load. 4.A method of increasing the output amplification ratio in an impedancetransformation amplifier driving a load with gated switches, comprisingthe steps of: providing a plurality of phase-synchronizedimpedance-transformation stages connected between a source of power andthe gated switches; and pulse-width modulating the transformation stagessuch that each contributes a respective portion of the voltage orcurrent through the load.
 5. The method of claim 4, wherein eachimpedance transformation stage contributes a substantially equal portionof the voltage or current through the load.